221 lines
7.1 KiB
C
221 lines
7.1 KiB
C
/* Copyright (C) 2003 Jean-Marc Valin */
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/**
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@file fixed_generic.h
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@brief ARM-tuned fixed-point operations
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*/
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/*
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of the Xiph.org Foundation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR
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CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef FIXED_ARM5E_H
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#define FIXED_ARM5E_H
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#define NEG16(x) (-(x))
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#define NEG32(x) (-(x))
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#define EXTRACT16(x) ((spx_word16_t)x)
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#define EXTEND32(x) ((spx_word32_t)x)
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#define SHR16(a,shift) ((a) >> (shift))
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#define SHL16(a,shift) ((a) << (shift))
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#define SHR32(a,shift) ((a) >> (shift))
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#define SHL32(a,shift) ((a) << (shift))
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#define PSHR16(a,shift) (SHR16((a)+(1<<((shift)-1)),shift))
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#define PSHR32(a,shift) (SHR32((a)+(1<<((shift)-1)),shift))
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#define SATURATE16(x,a) (((x)>(a) ? (a) : (x)<-(a) ? -(a) : (x)))
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#define SATURATE32(x,a) (((x)>(a) ? (a) : (x)<-(a) ? -(a) : (x)))
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#define SHR(a,shift) ((a) >> (shift))
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#define SHL(a,shift) ((a) << (shift))
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#define SATURATE(x,a) ((x)>(a) ? (a) : (x)<-(a) ? -(a) : (x))
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#define PSHR(a,shift) (SHR((a)+(1<<((shift)-1)),shift))
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#define ADD16(a,b) ((short)((short)(a)+(short)(b)))
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#define SUB16(a,b) ((a)-(b))
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#define ADD32(a,b) ((a)+(b))
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#define SUB32(a,b) ((a)-(b))
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#define ADD64(a,b) ((a)+(b))
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/* result fits in 16 bits */
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#define MULT16_16_16(a,b) (((short)(a))*((short)(b)))
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static inline spx_word32_t MULT16_16(spx_word16_t x, spx_word16_t y) {
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int res;
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asm ("smulbb %0,%1,%2;\n"
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: "=&r"(res)
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: "%r"(x),"r"(y));
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return(res);
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}
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static inline spx_word32_t MAC16_16(spx_word32_t a, spx_word16_t x, spx_word32_t y) {
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int res;
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asm ("smlabb %0,%1,%2,%3;\n"
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: "=&r"(res)
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: "%r"(x),"r"(y),"r"(a));
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return(res);
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}
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#define MULT16_32_Q12(a,b) ADD32(MULT16_16((a),SHR((b),12)), SHR(MULT16_16((a),((b)&0x00000fff)),12))
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#define MULT16_32_Q13(a,b) ADD32(MULT16_16((a),SHR((b),13)), SHR(MULT16_16((a),((b)&0x00001fff)),13))
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#define MULT16_32_Q14(a,b) ADD32(MULT16_16((a),SHR((b),14)), SHR(MULT16_16((a),((b)&0x00003fff)),14))
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static inline spx_word32_t MULT16_32_Q15(spx_word16_t x, spx_word32_t y) {
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int res;
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asm ("smulwb %0,%1,%2;\n"
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: "=&r"(res)
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: "%r"(y<<1),"r"(x));
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return(res);
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}
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static inline spx_word32_t MAC16_32_Q15(spx_word32_t a, spx_word16_t x, spx_word32_t y) {
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int res;
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asm ("smlawb %0,%1,%2,%3;\n"
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: "=&r"(res)
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: "%r"(y<<1),"r"(x),"r"(a));
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return(res);
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}
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static inline spx_word32_t MULT16_32_Q11(spx_word16_t x, spx_word32_t y) {
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int res;
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asm ("smulwb %0,%1,%2;\n"
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: "=&r"(res)
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: "%r"(y<<5),"r"(x));
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return(res);
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}
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static inline spx_word32_t MAC16_32_Q11(spx_word32_t a, spx_word16_t x, spx_word32_t y) {
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int res;
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asm ("smlawb %0,%1,%2,%3;\n"
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: "=&r"(res)
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: "%r"(y<<5),"r"(x),"r"(a));
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return(res);
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}
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#define MAC16_16_Q11(c,a,b) (ADD32((c),SHR(MULT16_16((a),(b)),11)))
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#define MAC16_16_Q13(c,a,b) (ADD32((c),SHR(MULT16_16((a),(b)),13)))
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#define MULT16_16_Q11_32(a,b) (SHR(MULT16_16((a),(b)),11))
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#define MULT16_16_Q13(a,b) (SHR(MULT16_16((a),(b)),13))
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#define MULT16_16_Q14(a,b) (SHR(MULT16_16((a),(b)),14))
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#define MULT16_16_Q15(a,b) (SHR(MULT16_16((a),(b)),15))
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#define MULT16_16_P13(a,b) (SHR(ADD32(4096,MULT16_16((a),(b))),13))
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#define MULT16_16_P14(a,b) (SHR(ADD32(8192,MULT16_16((a),(b))),14))
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#define MULT16_16_P15(a,b) (SHR(ADD32(16384,MULT16_16((a),(b))),15))
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#define MUL_16_32_R15(a,bh,bl) ADD32(MULT16_16((a),(bh)), SHR(MULT16_16((a),(bl)),15))
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/*
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#define DIV32_16(a,b) ((short)(((signed int)(a))/((short)(b))))
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*/
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static inline short DIV3216(int a, int b)
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{
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int res=0;
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int dead1, dead2, dead3, dead4, dead5;
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__asm__ __volatile__ (
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"\teor %5, %0, %1\n"
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"\tmovs %4, %0\n"
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"\trsbmi %0, %0, #0 \n"
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"\tmovs %4, %1\n"
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"\trsbmi %1, %1, #0 \n"
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"\tmov %4, #1\n"
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"\tsubs %3, %0, %1, asl #14 \n"
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"\torrpl %2, %2, %4, asl #14 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #13 \n"
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"\torrpl %2, %2, %4, asl #13 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #12 \n"
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"\torrpl %2, %2, %4, asl #12 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #11 \n"
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"\torrpl %2, %2, %4, asl #11 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #10 \n"
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"\torrpl %2, %2, %4, asl #10 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #9 \n"
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"\torrpl %2, %2, %4, asl #9 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #8 \n"
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"\torrpl %2, %2, %4, asl #8 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #7 \n"
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"\torrpl %2, %2, %4, asl #7 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #6 \n"
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"\torrpl %2, %2, %4, asl #6 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #5 \n"
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"\torrpl %2, %2, %4, asl #5 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #4 \n"
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"\torrpl %2, %2, %4, asl #4 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #3 \n"
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"\torrpl %2, %2, %4, asl #3 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #2 \n"
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"\torrpl %2, %2, %4, asl #2 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1, asl #1 \n"
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"\torrpl %2, %2, %4, asl #1 \n"
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"\tmovpl %0, %3 \n"
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"\tsubs %3, %0, %1 \n"
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"\torrpl %2, %2, %4 \n"
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"\tmovpl %0, %3 \n"
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"\tmovs %5, %5, lsr #31 \n"
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"\trsbne %2, %2, #0 \n"
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: "=r" (dead1), "=r" (dead2), "=r" (res),
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"=r" (dead3), "=r" (dead4), "=r" (dead5)
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: "0" (a), "1" (b), "2" (res)
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: "memory", "cc"
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);
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return res;
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}
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#define DIV32(a,b) (((signed int)(a))/((signed int)(b)))
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#endif
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