Some more src docs for the A/P implementation.
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@ -29,6 +29,12 @@ using namespace FGXMLAutopilot;
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/**
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/**
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* @brief Flip flop implementation for a RS flip flop with dominant RESET
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* @brief Flip flop implementation for a RS flip flop with dominant RESET
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*
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*
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* RS (reset-set) flip flops act as a fundamental latch. It has two input lines,
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* S (set) and R (reset). Activating the set input sets the output while activating
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* the reset input resets the output. If both inputs are activated, the output
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* is deactivated, too. This is why the RESET line is called dominant. Use a
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* SRFlipFlopImplementation for a dominant SET line.
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*
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* <table>
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* <table>
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* <tr>
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* <tr>
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* <td colspan="3">Logictable</td>
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* <td colspan="3">Logictable</td>
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@ -61,6 +67,12 @@ public:
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/**
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/**
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* @brief Flip flop implementation for a RS flip flop with dominant SET
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* @brief Flip flop implementation for a RS flip flop with dominant SET
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*
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*
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* SR (set-reset) flip flops act as a fundamental latch. It has two input lines,
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* S (set) and R (reset). Activating the set input sets the output while activating
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* the reset input resets the output. If both inputs are activated, the output
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* is activated, too. This is why the SET line is called dominant. Use a
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* RSFlipFlopImplementation for a dominant RESET line.
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*
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* <table>
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* <table>
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* <tr>
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* <tr>
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* <td colspan="3">Logictable</td>
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* <td colspan="3">Logictable</td>
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@ -92,7 +104,11 @@ public:
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*
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*
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* A clocked flip flop computes it's output on the raising edge (false/true transition)
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* A clocked flip flop computes it's output on the raising edge (false/true transition)
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* of the clock input. If such a transition is detected, the onRaisingEdge method is called
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* of the clock input. If such a transition is detected, the onRaisingEdge method is called
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* by this implementation
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* by this implementation. All clocked flip flops inherit from the RS flip flop and may
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* be set or reset by the respective set/reset lines. Note that the RS implementation
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* ignores the clock, The output is set immediately, regardless of the state of the clock
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* input. The "clock" input is mandatory for clocked flip flops.
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*
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*/
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*/
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class ClockedFlipFlopImplementation : public RSFlipFlopImplementation {
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class ClockedFlipFlopImplementation : public RSFlipFlopImplementation {
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private:
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private:
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@ -119,7 +135,8 @@ public:
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ClockedFlipFlopImplementation( bool rIsDominant = true ) : RSFlipFlopImplementation( rIsDominant ), _clock(false) {}
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ClockedFlipFlopImplementation( bool rIsDominant = true ) : RSFlipFlopImplementation( rIsDominant ), _clock(false) {}
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/**
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/**
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* @brief evaluates the output state from the input lines, basically waits for a raising edge and calls onRaisingEdge
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* @brief evaluates the output state from the input lines.
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* This method basically waits for a raising edge and calls onRaisingEdge
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* @param dt the elapsed time in seconds from since the last call
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* @param dt the elapsed time in seconds from since the last call
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* @param input a map of named input lines
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* @param input a map of named input lines
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* @param q a reference to a boolean variable to receive the output state
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* @param q a reference to a boolean variable to receive the output state
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@ -128,37 +145,137 @@ public:
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virtual bool getState( double dt, DigitalComponent::InputMap input, bool & q );
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virtual bool getState( double dt, DigitalComponent::InputMap input, bool & q );
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};
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};
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/**
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* @brief Implements a JK flip flop as a clocked flip flop
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*
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* The JK flip flop has five input lines: R, S, clock, J and K. The R and S lines work as described
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* in the RS flip flop. Setting the J line to true sets the output to true on the next raising
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* edge of the clock line. Setting the K line to true sets the output to false on the next raising
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* edge of the clock line. If both, J and K are true, the output is toggled at with every raising
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* edge of the clock line.
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*
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* Undefined inputs default to false.
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*
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* <table>
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* <tr>
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* <td colspan="7">Logictable</td>
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* </tr>
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* <tr>
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* <td>S</td><td>R</td><td>J</td><td>K</td><td>clock</td><td>Q (previous)</td><td>Q</td>
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* </tr>
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* <tr>
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* <td>false</td><td>false</td><td>false</td><td>false</td><td>any</td><td>any</td><td>unchanged</td>
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* </tr>
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* <tr>
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* <td>true</td><td>false</td><td>any</td><td>any</td><td>any</td><td>any</td><td>true</td>
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* </tr>
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* <tr>
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* <td>any</td><td>true</td><td>any</td><td>any</td><td>any</td><td>any</td><td>false</td>
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* </tr>
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* <tr>
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* <td>false</td><td>false</td><td>true</td><td>false</td><td>^</td><td>any</td><td>true</td>
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* </tr>
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* <tr>
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* <td>false</td><td>false</td><td>false</td><td>true</td><td>^</td><td>any</td><td>false</td>
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* </tr>
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* <tr>
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* <td>false</td><td>false</td><td>true</td><td>true</td><td>^</td><td>false</td><td>true</td>
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* </tr>
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* <tr>
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* <td>false</td><td>false</td><td>true</td><td>true</td><td>^</td><td>true</td><td>false</td>
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* </tr>
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* </table>
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*/
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class JKFlipFlopImplementation : public ClockedFlipFlopImplementation {
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class JKFlipFlopImplementation : public ClockedFlipFlopImplementation {
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public:
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public:
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/**
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* @brief constructor for a JKFlipFlopImplementation
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* @param rIsDominant boolean flag to signal if RESET shall be dominant (true) or SET shall be dominant (false)
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*/
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JKFlipFlopImplementation( bool rIsDominant = true ) : ClockedFlipFlopImplementation ( rIsDominant ) {}
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JKFlipFlopImplementation( bool rIsDominant = true ) : ClockedFlipFlopImplementation ( rIsDominant ) {}
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/**
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* @brief compute the output state according to the logic table on the raising edge of the clock
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* @param input a map of named input lines
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* @param q a reference to a boolean variable to receive the output state
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* @return true if the state has changed, false otherwise
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*/
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virtual bool onRaisingEdge( DigitalComponent::InputMap input, bool & q );
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virtual bool onRaisingEdge( DigitalComponent::InputMap input, bool & q );
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};
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};
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/**
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* @brief Implements a D (delay) flip flop.
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*
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*/
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class DFlipFlopImplementation : public ClockedFlipFlopImplementation {
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class DFlipFlopImplementation : public ClockedFlipFlopImplementation {
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public:
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public:
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/**
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* @brief constructor for a DFlipFlopImplementation
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* @param rIsDominant boolean flag to signal if RESET shall be dominant (true) or SET shall be dominant (false)
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*/
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DFlipFlopImplementation( bool rIsDominant = true ) : ClockedFlipFlopImplementation ( rIsDominant ) {}
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DFlipFlopImplementation( bool rIsDominant = true ) : ClockedFlipFlopImplementation ( rIsDominant ) {}
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/**
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* @brief compute the output state according to the logic table on the raising edge of the clock
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* @param input a map of named input lines
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* @param q a reference to a boolean variable to receive the output state
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* @return true if the state has changed, false otherwise
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*/
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virtual bool onRaisingEdge( DigitalComponent::InputMap input, bool & q ) {
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virtual bool onRaisingEdge( DigitalComponent::InputMap input, bool & q ) {
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q = input.get_value("D");
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q = input.get_value("D");
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return true;
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return true;
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}
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}
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};
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};
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/**
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* @brief Implements a T (toggle) flip flop.
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*
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*/
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class TFlipFlopImplementation : public ClockedFlipFlopImplementation {
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class TFlipFlopImplementation : public ClockedFlipFlopImplementation {
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public:
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public:
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/**
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* @brief constructor for a TFlipFlopImplementation
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* @param rIsDominant boolean flag to signal if RESET shall be dominant (true) or SET shall be dominant (false)
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*/
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TFlipFlopImplementation( bool rIsDominant = true ) : ClockedFlipFlopImplementation ( rIsDominant ) {}
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TFlipFlopImplementation( bool rIsDominant = true ) : ClockedFlipFlopImplementation ( rIsDominant ) {}
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/**
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* @brief compute the output state according to the logic table on the raising edge of the clock
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* @param input a map of named input lines
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* @param q a reference to a boolean variable to receive the output state
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* @return true if the state has changed, false otherwise
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*/
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virtual bool onRaisingEdge( DigitalComponent::InputMap input, bool & q ) {
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virtual bool onRaisingEdge( DigitalComponent::InputMap input, bool & q ) {
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q = !q;
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q = !q;
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return true;
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return true;
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}
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}
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};
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};
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/**
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* @brief Implements a monostable flip flop
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*
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* The stable output state is false.
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*
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*/
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class MonoFlopImplementation : public JKFlipFlopImplementation {
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class MonoFlopImplementation : public JKFlipFlopImplementation {
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protected:
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protected:
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virtual bool configure( const std::string & nodeName, SGPropertyNode_ptr configNode );
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virtual bool configure( const std::string & nodeName, SGPropertyNode_ptr configNode );
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InputValueList _time;
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InputValueList _time;
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double _t;
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double _t;
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public:
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public:
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/**
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* @brief constructor for a MonoFlopImplementation
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* @param rIsDominant boolean flag to signal if RESET shall be dominant (true) or SET shall be dominant (false)
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*/
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MonoFlopImplementation( bool rIsDominant = true ) : JKFlipFlopImplementation( rIsDominant ) {}
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MonoFlopImplementation( bool rIsDominant = true ) : JKFlipFlopImplementation( rIsDominant ) {}
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/**
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* @brief evaluates the output state from the input lines and returns to the stable state
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* after expiry of the internal timer
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* @param dt the elapsed time in seconds from since the last call
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* @param input a map of named input lines
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* @param q a reference to a boolean variable to receive the output state
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* @return true if the state has changed, false otherwise
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*/
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virtual bool getState( double dt, DigitalComponent::InputMap input, bool & q );
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virtual bool getState( double dt, DigitalComponent::InputMap input, bool & q );
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};
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};
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